1. Field of the Invention
The present invention relates to an MOS type semiconductor component having a plurality of wire-form semiconductor layers and to a semiconductor device using this semiconductor component.
2. Description of the Related Art
In a conventional MOS type semiconductor component, a gate electrode is formed on a planar channel region provided between source/drain regions through a gate insulating film. Control over a current flowing through the channel region is carried out by controlling a potential in the channel region based on capacitance coupling between the gate electrode and the channel region through the gate insulating film. Further, miniaturization of the component has been advanced to improve the performance of the component.
However, when miniaturization of the component advances, the potential in the channel region is greatly affected by not only the gate electrode but also a potential in the source/drain regions. Therefore, the controllability of the gate electrode over the potential in the channel region is lowered, and a so-called short channel effect, in which a current flowing through the channel region cannot be controlled by the gate electrode, thereby becomes obvious.
As a countermeasure for the above-explained problem, a so-called wire-form structure component in which a channel region is formed into a wire-form structure and a gate electrode is formed on upper, left, and right sides of the channel region through a gate insulating film has been proposed (see, e.g., J. P. Colinge, et al., “A silicon-on-insulator quantum wire,” in Solid-State Electronics vol. 39 no. 1 (1996) pp. 49-51). Such a structure improves the controllability of the gate electrode over the potential in the channel region and thereby enhances the controllability of the gate electrode for the current flowing through the channel region.
Further, since a film thickness of the gate insulating film is reduced as miniaturization of the component advances, when the gate insulating film is formed of the same silicon oxide as that used in the conventional technology, the current flowing through the gate insulating film cannot be ignored. As a result, the gate insulating film, which was intended to function as an insulating film, cannot function as the insulating film. As a countermeasure, there has been developed a component in which a gate insulating film is formed of a material having a higher dielectric constant than that of a silicon oxide to increase a geometric thickness, i.e., a physical film thickness of the gate insulating film, thereby suppressing a current flowing through the gate insulating film (see, e.g., G. D. Wilk, et al., “High-k gate dielectrics: Current status and materials properties considerations,” in Journal of Applied Physics vol. 89 no. 10 (2001) pp. 5243-5275).
In the above-explained wire-form structure component, although the controllability of the gate electrode with respect to the potential in the channel region can be improved, ingenuity must be exercised to obtain a high current driving force since the channel region is formed into a wire-form structure. Therefore, the current driving force is improved by forming a plurality of thin wires constituting the channel regions in parallel. Accordingly, intervals between the wire-form channel regions must be narrowed to densely form the channel regions in order to further improve the current driving force per unit width measured in parallel with a semiconductor substrate surface.
However, when each interval between the channel regions (thin wires) becomes lower than twofold the physical film thickness of the gate insulating film, a new problem occurs. That is, when each interval between the channel regions is wider than twofold the physical film thickness of the gate insulating film, since the gate electrode is formed above the upper, left, and right sides of each channel region, the controllability of the gate electrode with respect to the potential in each channel region is improved. This is one of advantages of the wire-form structure component. Here, the interval between the channel regions means a distance between the channel regions adjacent to each other, which is measured perpendicularly to a main direction of the current flowing through the channel region (thin wire) and in parallel with the semiconductor substrate surface.
However, when each interval between the channel regions is equal to or below twofold the gate insulating film, the gate electrode cannot be formed between the channel regions adjacent to each other, and the gate electrode is formed above the upper side of each channel region alone. In such a case, the advantage of the wire-form structure component, i.e., an improvement in the controllability of the gate electrode over the potential in the channel regions due to formation of the gate electrode above the upper, left, and right sides of each channel region is lost.
Therefore, each interval between the channel regions cannot be narrowed to be less than twofold the physical film thickness of the gate insulating film, which obstructs an improvement in the current driving force. As explained above, the conventional technology has a problem that suppression of the short channel effect due to an improvement in the controllability of the gate electrode over the potential in the channel regions and acquirement of a high current driving force cannot be achieved.
Therefore, in the wire-form structure component, even when the gate electrode is formed above the upper side of each channel region alone, improving the controllability of the gate electrode for the potential in each channel region has been demanded. When the short channel effect is suppressed by improving the controllability of the gate electrode, a component in which each interval between the channel regions is narrower than twofold the physical film thickness of the gate insulating film can be constructed. As a result, a component having the suppressed short channel effect and a high current driving force can be realized.